Exemplary embodiments disclosed herein generally relate to formation of lines and, more particularly, to formation of bit lines in a semiconductor device. Exemplary embodiments disclosed herein also relate to bit lines in a semiconductor device such as a non-volatile memory device and a method for forming the same.
As semiconductor devices become increasingly integrated, the widths of patterns and the intervals between adjacent patterns decrease. Conventionally, fine patterns are formed by performing various photolithography processes. However, as the degree to which semiconductor devices are integrated increases, a misalignment margin in such photolithography processes decreases. Accordingly, fine patterns (e.g., contacts) are often misaligned with respect to underlying conductive regions during photolithography processes. For example, when even a slight degree of a misalignment occurs during a photolithography process for forming a bit line, misalignment between bit lines and bit line contacts occurs, thereby bridging one bit line to an adjacent bit line. Moreover, due to the reduction of a photolithography process margin, adjacent bit lines can become electrically connected to each other.